Determining the theoretical performance of an integrated circuit design is often used to perform initial studies on a given design. By altering or modifying the design, the performance of the design may be improved without expending the resources required to manufacture and test physical integrated circuits. Additionally, errors or bugs in the design may be corrected to further improve the design before production.
Verification of the performance of an RTL design relies on determining the theoretical performance of the design. For example, the theoretical performance of an integrated circuit design may be compared to performance of an RTL design to verify the performance thereof. Such verification is commonly used to perform final debugging of the design and increase confidence in the robustness of the design.
Conventional approaches to determining the theoretical performance of an integrated circuit design involve running many directed tests on a simulated model of a specific integrated circuit design. Results from each simulation are manually copied into a spreadsheet program and used to determine performance analysis for the integrated circuit design.
Such conventional approaches to determining performance analysis for an integrated circuit design are limited given the time and expense of simulating integrated circuit models. For example, the size of each directed test must be made relatively small to reduce the time and expense of the simulation, thereby providing a very small picture of the operation of the design. Accordingly, changes to the configuration of the design are often made that improve one area of the design while negatively affecting numerous other areas. Thus, the number of directed tests required to effect an improvement in the overall operation of the integrated circuit design is increased, thereby increasing the time and expense required to perform initial studies or formal verification on an integrated circuit design. Moreover, most changes to an integrated circuit design require the simulation for each directed test to be performed again, thereby further increasing time and cost.
Additionally, writing or producing directed tests based upon performance analysis of an integrated circuit design is difficult and time consuming given the required amount of skill and insight into the design. Further, producing directed tests to reduce the amount of simulation associated with performing initial studies or formal verification is also difficult and time consuming.